WDF, multiple MSI/MSIX interrupts, and hibernate/rebalance.

Hi folks,

The quick question:

What is the approved method for enumerating the WDF_INTERRUPT_INFO
structures and working out which (of several) WDFINTERRUPT’s is actually
connected? After a hibernate/rebalance, if MSI interrupts have fallen
back to using fewer message numbers than before, the actual WDFINTERRUPT
that gets connected appears to be arbitrary.

The detailed version:

I’ve recently been doing WHQL testing on a driver I’ve written and we’ve
encountered problems with some of the test cases indicating that I’m not
initialising or using interrupts correctly. I’ve got a good idea of
what’s wrong, but I need some help to correctly resolve the bug, and do
the right thing.

The hardware is a PCIe card, which supports 4 MSI interrupts, but it can
also fall back to legacy / line based interrupts.

  • I’m using WdfInterruptCreate in EvtDeviceAdd.

  • In EvtD0Entry I’m then iterating through the interrupts using
    WdfInterruptGetInfo, trying to work out how many are connected, and what
    sort they are.

  • The problem we’re seeing is: On the first interrupt we get after
    resuming (after hibernate or rebalance), the data in our interrupt
    context leads us (via some pointers) into our own datastructures, but
    these pointers are stale (or wrong), and everything falls apart. I think
    this is because I’m making silly assumptions about which if the
    WDFINTERRUPT objects is actually connected.

I’ve seen this problem:

  1. On PnP rebalance on a Vista machine supporting MSI interrupts.
  2. Resuming from a hibernate on a 2k3 machine which does not support MSI
    interrupts, where the driver is running several instances of our device.

What I think is happening:

  • On initial device addition and start, we see two cases:
  1. Line based interrupts. I create 4 WDFINTERRUPT objects OK, and then
    in d0_entry, I query the WDF_INTERRUPT_INFO, and see that either:

a) We get 4 message signalled interrupts with different message numbers,
and can use all 4.
b) If the O.S. does not support it, we see all the interrupt objects
indicating not message signalled.

in case b) I assume the interrupt that is actually connected is the first.

I am aware that there is a case where you ask for N MSI interrupts and
only get one,

  • On rebalance / hibernate it gets more complicated:

On resumption. I do the same query process, and sometimes see

  1. MSI interrupts where they are all set to have the same message number.
  2. For line based interrupts the interrupt vector is set to be the same
    for all the interrupts.

I think the bad assumption I’m making is that in *both* of these cases,
I assume “OK, we’ve had to fall back to only one interrupt (MSI or Line
based) it must be the first one”, and then I assume that the
WDFINTERRUPT that is actually connected is going to be the first one I
originally asked for, and hence I only end up re-initializing the
interrupt context for that first WDFINTERRUPT object, and then get a
nasty surprise when the 3rd (or nth) in my array of WDFINTERRUPTS fires
off instead (complete with stale context from before the
hibernate/rebalance!)

What is the approved method for enumerating the WDF_INTERRUPT_INFO
structures?

MH.

I have to read your email later in greater detail (and hopefully Jake
reads it as well), but let me clear up a couple of low hanging pieces of
fruit

  1. you should enumerate the WDFINTERRUPTs connect info in
    EvtDevicePrepareHardware. The connect info will remain the same until
    EvtDeviceReleaseHardware, so there is no need to evaluate them each time
    you enter D0.

  2. Hibernate/resume will not cause rebalance, so the info reported will
    not change in this case. Like I pointed out in 1),
    EvtDeviceReleaseHardware will be called when the interrupts information
    is “released” (during a rebalance for instance) and then
    EvtDevicePrepareHardware will called again with the new connect
    information.

d

-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com] On Behalf Of Martin Harvey
Sent: Thursday, January 11, 2007 9:10 AM
To: Windows System Software Devs Interest List
Subject: [ntdev] WDF, multiple MSI/MSIX interrupts, and
hibernate/rebalance.

Hi folks,

The quick question:

What is the approved method for enumerating the WDF_INTERRUPT_INFO
structures and working out which (of several) WDFINTERRUPT’s is actually

connected? After a hibernate/rebalance, if MSI interrupts have fallen
back to using fewer message numbers than before, the actual WDFINTERRUPT

that gets connected appears to be arbitrary.

The detailed version:

I’ve recently been doing WHQL testing on a driver I’ve written and we’ve

encountered problems with some of the test cases indicating that I’m not

initialising or using interrupts correctly. I’ve got a good idea of
what’s wrong, but I need some help to correctly resolve the bug, and do
the right thing.

The hardware is a PCIe card, which supports 4 MSI interrupts, but it can

also fall back to legacy / line based interrupts.

  • I’m using WdfInterruptCreate in EvtDeviceAdd.
  • In EvtD0Entry I’m then iterating through the interrupts using
    WdfInterruptGetInfo, trying to work out how many are connected, and what

sort they are.

  • The problem we’re seeing is: On the first interrupt we get after
    resuming (after hibernate or rebalance), the data in our interrupt
    context leads us (via some pointers) into our own datastructures, but
    these pointers are stale (or wrong), and everything falls apart. I think

this is because I’m making silly assumptions about which if the
WDFINTERRUPT objects is actually connected.

I’ve seen this problem:

  1. On PnP rebalance on a Vista machine supporting MSI interrupts.
  2. Resuming from a hibernate on a 2k3 machine which does not support MSI

interrupts, where the driver is running several instances of our device.

What I think is happening:

  • On initial device addition and start, we see two cases:
  1. Line based interrupts. I create 4 WDFINTERRUPT objects OK, and then
    in d0_entry, I query the WDF_INTERRUPT_INFO, and see that either:

a) We get 4 message signalled interrupts with different message numbers,

and can use all 4.
b) If the O.S. does not support it, we see all the interrupt objects
indicating not message signalled.

in case b) I assume the interrupt that is actually connected is the
first.

I am aware that there is a case where you ask for N MSI interrupts and
only get one,

  • On rebalance / hibernate it gets more complicated:

On resumption. I do the same query process, and sometimes see

  1. MSI interrupts where they are all set to have the same message
    number.
  2. For line based interrupts the interrupt vector is set to be the same
    for all the interrupts.

I think the bad assumption I’m making is that in *both* of these cases,
I assume “OK, we’ve had to fall back to only one interrupt (MSI or Line
based) it must be the first one”, and then I assume that the
WDFINTERRUPT that is actually connected is going to be the first one I
originally asked for, and hence I only end up re-initializing the
interrupt context for that first WDFINTERRUPT object, and then get a
nasty surprise when the 3rd (or nth) in my array of WDFINTERRUPTS fires
off instead (complete with stale context from before the
hibernate/rebalance!)

What is the approved method for enumerating the WDF_INTERRUPT_INFO
structures?

MH.


Questions? First check the Kernel Driver FAQ at
http://www.osronline.com/article.cfm?id=256

To unsubscribe, visit the List Server section of OSR Online at
http://www.osronline.com/page.cfm?name=ListServer

Doron & ntdev,

Many thanks for your help:

  1. you should enumerate the WDFINTERRUPTs connect info in
    EvtDevicePrepareHardware. The connect info will remain the same until
    EvtDeviceReleaseHardware, so there is no need to evaluate them each time
    you enter D0.

Yes, I’m now doing that, although I am doing another call in
d0_entry_post_interrupt, just as a check - I’m not modifying any state
in this second call, just being prepared to spew dbg if things have changed.

  1. Hibernate/resume will not cause rebalance, so the info reported will
    not change in this case.

OK.

I have seen some odd situations on 2k3 server but I’m more than happy to
agree with you unless I can reproduce a problem. Test suites on 2k3 are
currently re-running. In addition I’ve fixed a couple of bugs in our
driver…

What I have seen *reproducibly* on Vista is what *looks like* an
interrupt storm. After a rebalance where my number of MSI interrupts is
cut from 4 down to 1, my driver code does some init/test routines which
should result in the card generating a single MSI interrupt. My ISR gets
called repeatedly, until an assertion in KeUpdateRuntime+248 gets
called, because the Kernel Watchdog DPC has not had a chance to run.

Suspecting that our hardware was at fault (i.e. possible silicon bug), I
rigged up a PCIe bus analyzer and retested. After checking the output,
it’s clear that the hardware is generating a single MSI interrupt with
the correct address and data. I used !pci after the rebalance to check
that the MsgAddress and MsgData in the PCI config space were the same as
that generated in the bus trace, and verified that the hardware is
working correctly.

So, what seems to be happening is that my ISR is being called repeatedly
from KiChainedDispatch2ndLvl. I do not see any evidence that the call
stack unwinds out of KiChainedDispatch, and in fact I can put breakpoints

So, providing some traces etc: here’s the initial device start:

[sfcbus] v2.1.0022: built Jan 12 2007 17:04:36
[sfcbus] DriverEntry
[sfcbus] bus_read_registry
[sfcbus] bus_evt_device_add: 0x7B55FB58
[sfcbus] bus_read_registry
[sfcbus] bus_evt_device_add: created 4 interrupt objects.
[sfcbus] bus_prepare_hardware: START
00000000 2419 0307 4705 1000 0100 0002 1000 8000 $…G…
00000010 0140 0000 0000 0000 0c00 fece 0000 0000 .@…
00000020 0000 0000 0000 0000 0000 0000 2419 0100 …$…
00000030 0000 0000 4000 0000 0000 0000 0001 0000 …@…
[sfcbus] resource[0] port: 4000(4000)+100(100)
[sfcbus] resource[1] private 1 0 0
[sfcbus] resource[2] memory: cefe0000(cefe0000)+20000(20000)
[sfcbus] resource[3] private 1 2 0
[sfcbus] resource[4] interrupt: L 80000(9) V fffffffc(a8) A 0(3)
[sfcbus] bus_setup_or_check_interrupts: START
[sfcbus] bus_print_interrupt_info: START Interrupt config during
prepare hardware:
[sfcbus] bus_print_interrupt_info: Idx: 0 MsgNum: 0x0 Vector: 0xa8 Irql: 9
[sfcbus] bus_print_interrupt_info: Mode: Latched Polarity:
WdfInterruptPolarityUnknown
[sfcbus] bus_print_interrupt_info: MsgSignalled: Yes ShareDisposition:
CmResourceShareShared
[sfcbus] bus_print_interrupt_info: Idx: 1 MsgNum: 0x1 Vector: 0xa9 Irql: 9
[sfcbus] bus_print_interrupt_info: Mode: Latched Polarity:
WdfInterruptPolarityUnknown
[sfcbus] bus_print_interrupt_info: MsgSignalled: Yes ShareDisposition:
CmResourceShareShared
[sfcbus] bus_print_interrupt_info: Idx: 2 MsgNum: 0x2 Vector: 0xaa Irql: 9
[sfcbus] bus_print_interrupt_info: Mode: Latched Polarity:
WdfInterruptPolarityUnknown
[sfcbus] bus_print_interrupt_info: MsgSignalled: Yes ShareDisposition:
CmResourceShareShared
[sfcbus] bus_print_interrupt_info: Idx: 3 MsgNum: 0x3 Vector: 0xab Irql: 9
[sfcbus] bus_print_interrupt_info: Mode: Latched Polarity:
WdfInterruptPolarityUnknown
[sfcbus] bus_print_interrupt_info: MsgSignalled: Yes ShareDisposition:
CmResourceShareShared
[sfcbus] bus_print_interrupt_info: Total interrupts: 4 MSI interrupts: 4
[sfcbus] bus_print_interrupt_info: END
[sfcbus] bus_setup_or_check_interrupts: END
[sfcbus] bus_prepare_hardware: END
[sfcbus] bus_d0_entry: START
[sfcbus] bus_d0_entry: SUCCESS
[sfcbus] bus_d0_entry_post_interrupt: START
[sfcbus] bus_setup_or_check_interrupts: START
[sfcbus] bus_setup_or_check_interrupts: END
[sfcbus] falcon_intr_probe: NET
[sfcbus] falcon_intr_init: NET
[sfcbus] falcon_intr_status: NET 0x00000000
[sfcbus] falcon_intr_status: NET 0x00000000
[sfcbus] drv_rxq_enable: [0]
[sfcbus] bus enumerator: setting up uncreated NDIS PDO
[sfcbus] bus_setup_ndis_pdo: exported NDIS interface for port 0
[sfcbus] bus enumerator: setting up uncreated NDIS PDO
[sfcbus] bus_setup_ndis_pdo: exported NDIS interface for port 1
[sfcbus] bus_d0_entry_post_interrupt: END

And here’s the restart after the rebalance:

PNPFILTR: Received IRP_MN_START_DEVICE for stack with PDO 0x84472B98
[sfcbus] bus_prepare_hardware: START
PNPFILTR: Received IRP_MN_QUERY_CAPABILITIES which I am simply passing down
PNPFILTR: Received IRP_MN_READ_CONFIG which I am simply passing down
00000000 2419 0307 4705 1000 0100 0002 1000 8000 $…G…
00000010 0140 0000 0000 0000 0c00 fece 0000 0000 .@…
00000020 0000 0000 0000 0000 0000 0000 2419 0100 …$…
00000030 0000 0000 4000 0000 0000 0000 0001 0000 …@…
[sfcbus] resource[0] port: 4000(4000)+100(100)
[sfcbus] resource[1] private 1 0 0
[sfcbus] resource[2] memory: cefe0000(cefe0000)+20000(20000)
[sfcbus] resource[3] private 1 2 0
[sfcbus] resource[4] interrupt: L 80000(9) V fffffffc(a8) A 0(3)
[sfcbus] bus_setup_or_check_interrupts: START
[sfcbus] bus_calc_msi_intrs: INFO: Duplicate MSI message number: 0
[sfcbus] bus_calc_msi_intrs: INFO: Duplicate MSI message number: 0
[sfcbus] bus_calc_msi_intrs: INFO: Duplicate MSI message number: 0
[sfcbus] bus_print_interrupt_info: START Interrupt config during
prepare hardware:
[sfcbus] bus_print_interrupt_info: Idx: 0 MsgNum: 0x0 Vector: 0xa8 Irql: 9
[sfcbus] bus_print_interrupt_info: Mode: Latched Polarity:
WdfInterruptPolarityUnknown
[sfcbus] bus_print_interrupt_info: MsgSignalled: Yes ShareDisposition:
CmResourceShareShared
[sfcbus] bus_print_interrupt_info: Idx: 1 MsgNum: 0x0 Vector: 0xa8 Irql: 9
[sfcbus] bus_print_interrupt_info: Mode: Latched Polarity:
WdfInterruptPolarityUnknown
[sfcbus] bus_print_interrupt_info: MsgSignalled: Yes ShareDisposition:
CmResourceShareShared
[sfcbus] bus_print_interrupt_info: Idx: 2 MsgNum: 0x0 Vector: 0xa8 Irql: 9
[sfcbus] bus_print_interrupt_info: Mode: Latched Polarity:
WdfInterruptPolarityUnknown
[sfcbus] bus_print_interrupt_info: MsgSignalled: Yes ShareDisposition:
CmResourceShareShared
[sfcbus] bus_print_interrupt_info: Idx: 3 MsgNum: 0x0 Vector: 0xa8 Irql: 9
[sfcbus] bus_print_interrupt_info: Mode: Latched Polarity:
WdfInterruptPolarityUnknown
[sfcbus] bus_print_interrupt_info: MsgSignalled: Yes ShareDisposition:
CmResourceShareShared
[sfcbus] bus_calc_msi_intrs: INFO: Duplicate MSI message number: 0
[sfcbus] bus_calc_msi_intrs: INFO: Duplicate MSI message number: 0
[sfcbus] bus_calc_msi_intrs: INFO: Duplicate MSI message number: 0
[sfcbus] bus_print_interrupt_info: Total interrupts: 4 MSI interrupts: 1
[sfcbus] bus_print_interrupt_info: END
[sfcbus] bus_setup_or_check_interrupts: END
[sfcbus] bus_prepare_hardware: END
[sfcbus] bus_d0_entry: START
PNPFILTR: Received IRP_MN_QUERY_INTERFACE which I am simply passing down
PNPFILTR: Received IRP_MN_QUERY_INTERFACE which I am simply passing down
[sfcbus] bus_d0_entry: SUCCESS
[sfcbus] bus_d0_entry_post_interrupt: START
[sfcbus] bus_setup_or_check_interrupts: START
[sfcbus] bus_setup_or_check_interrupts: END
[sfcbus] falcon_intr_probe: NET
[sfcbus] falcon_intr_init: NET
[sfcbus] falcon_intr_status: NET 0x00000000
[sfcbus] falcon_intr_status: NET 0x00000000
[sfcbus] falcon_intr_status: NET 0x00000000
[sfcbus] falcon_intr_status: NET 0x00000000

I then get lots of “falcon_intr_status” messages, indicating that the
ISR is being called repeatedly. If I then turn off debug, I wait a few
seconds, and then get:

Assertion failure - code c0000420 (first chance)
nt!KeUpdateRunTime+0x248:
81867a71 cd2c int 2Ch

I then use !pcr to check the DPC queues, and find:

DpcQueue: 0x85deedc8 0x8a4d1e9d [Normal] USBPORT!USBPORT_IsrDpc
0x8463de24 0x81d0a5f3 [Normal] Wdf01000!FxDpc::FxDpcThunk
0x84dcad8c 0x81c8c758 [Normal] acpi!ACPIInterruptServiceRoutineDPC
0x85d26dc8 0x8a4d1e9d [Normal] USBPORT!USBPORT_IsrDpc
0x85e8e604 0x822011c7 [Normal] ndis!ndisInterruptDpc

So I then do:

0: kd> bp Wdf01000!FxDpc::FxDpcThunk
0: kd> bl
0 e 81d0a5f3 0001 (0001) Wdf01000!FxDpc::FxDpcThunk

0: kd> g

But I never hit the breakpoint…

MH.

When the error occurs, type the following in the debugger:

kb
!acpiirqarb
!idt
!arbiter 4

Then post the results.

  • Jake

“Martin Harvey” wrote in message
news:xxxxx@ntdev…
> Doron & ntdev,
>
> Many thanks for your help:
>
>>1) you should enumerate the WDFINTERRUPTs connect info in
>>EvtDevicePrepareHardware. The connect info will remain the same until
>>EvtDeviceReleaseHardware, so there is no need to evaluate them each time
>>you enter D0.
>>
> Yes, I’m now doing that, although I am doing another call in
> d0_entry_post_interrupt, just as a check - I’m not modifying any state in
> this second call, just being prepared to spew dbg if things have changed.
>
>>2) Hibernate/resume will not cause rebalance, so the info reported will
>>not change in this case.
>>
> OK.
>
> I have seen some odd situations on 2k3 server but I’m more than happy to
> agree with you unless I can reproduce a problem. Test suites on 2k3 are
> currently re-running. In addition I’ve fixed a couple of bugs in our
> driver…
>
> What I have seen reproducibly on Vista is what looks like an interrupt
> storm. After a rebalance where my number of MSI interrupts is cut from 4
> down to 1, my driver code does some init/test routines which should result
> in the card generating a single MSI interrupt. My ISR gets called
> repeatedly, until an assertion in KeUpdateRuntime+248 gets called, because
> the Kernel Watchdog DPC has not had a chance to run.
>
> Suspecting that our hardware was at fault (i.e. possible silicon bug), I
> rigged up a PCIe bus analyzer and retested. After checking the output,
> it’s clear that the hardware is generating a single MSI interrupt with the
> correct address and data. I used !pci after the rebalance to check that
> the MsgAddress and MsgData in the PCI config space were the same as that
> generated in the bus trace, and verified that the hardware is working
> correctly.
>
> So, what seems to be happening is that my ISR is being called repeatedly
> from KiChainedDispatch2ndLvl. I do not see any evidence that the call
> stack unwinds out of KiChainedDispatch, and in fact I can put breakpoints
>
>
> So, providing some traces etc: here’s the initial device start:
>
> [sfcbus] v2.1.0022: built Jan 12 2007 17:04:36
> [sfcbus] DriverEntry
> [sfcbus] bus_read_registry
> [sfcbus] bus_evt_device_add: 0x7B55FB58
> [sfcbus] bus_read_registry
> [sfcbus] bus_evt_device_add: created 4 interrupt objects.
> [sfcbus] bus_prepare_hardware: START
> 00000000 2419 0307 4705 1000 0100 0002 1000 8000 $…G…
> 00000010 0140 0000 0000 0000 0c00 fece 0000 0000 .@…
> 00000020 0000 0000 0000 0000 0000 0000 2419 0100 …$…
> 00000030 0000 0000 4000 0000 0000 0000 0001 0000 …@…
> [sfcbus] resource[0] port: 4000(4000)+100(100)
> [sfcbus] resource[1] private 1 0 0
> [sfcbus] resource[2] memory: cefe0000(cefe0000)+20000(20000)
> [sfcbus] resource[3] private 1 2 0
> [sfcbus] resource[4] interrupt: L 80000(9) V fffffffc(a8) A 0(3)
> [sfcbus] bus_setup_or_check_interrupts: START
> [sfcbus] bus_print_interrupt_info: START Interrupt config during prepare
> hardware:
> [sfcbus] bus_print_interrupt_info: Idx: 0 MsgNum: 0x0 Vector: 0xa8 Irql:
> 9
> [sfcbus] bus_print_interrupt_info: Mode: Latched Polarity:
> WdfInterruptPolarityUnknown
> [sfcbus] bus_print_interrupt_info: MsgSignalled: Yes ShareDisposition:
> CmResourceShareShared
> [sfcbus] bus_print_interrupt_info: Idx: 1 MsgNum: 0x1 Vector: 0xa9 Irql:
> 9
> [sfcbus] bus_print_interrupt_info: Mode: Latched Polarity:
> WdfInterruptPolarityUnknown
> [sfcbus] bus_print_interrupt_info: MsgSignalled: Yes ShareDisposition:
> CmResourceShareShared
> [sfcbus] bus_print_interrupt_info: Idx: 2 MsgNum: 0x2 Vector: 0xaa Irql:
> 9
> [sfcbus] bus_print_interrupt_info: Mode: Latched Polarity:
> WdfInterruptPolarityUnknown
> [sfcbus] bus_print_interrupt_info: MsgSignalled: Yes ShareDisposition:
> CmResourceShareShared
> [sfcbus] bus_print_interrupt_info: Idx: 3 MsgNum: 0x3 Vector: 0xab Irql:
> 9
> [sfcbus] bus_print_interrupt_info: Mode: Latched Polarity:
> WdfInterruptPolarityUnknown
> [sfcbus] bus_print_interrupt_info: MsgSignalled: Yes ShareDisposition:
> CmResourceShareShared
> [sfcbus] bus_print_interrupt_info: Total interrupts: 4 MSI interrupts: 4
> [sfcbus] bus_print_interrupt_info: END
> [sfcbus] bus_setup_or_check_interrupts: END
> [sfcbus] bus_prepare_hardware: END
> [sfcbus] bus_d0_entry: START
> [sfcbus] bus_d0_entry: SUCCESS
> [sfcbus] bus_d0_entry_post_interrupt: START
> [sfcbus] bus_setup_or_check_interrupts: START
> [sfcbus] bus_setup_or_check_interrupts: END
> [sfcbus] falcon_intr_probe: NET
> [sfcbus] falcon_intr_init: NET
> [sfcbus] falcon_intr_status: NET 0x00000000
> [sfcbus] falcon_intr_status: NET 0x00000000
> [sfcbus] drv_rxq_enable: [0]
> [sfcbus] bus enumerator: setting up uncreated NDIS PDO
> [sfcbus] bus_setup_ndis_pdo: exported NDIS interface for port 0
> [sfcbus] bus enumerator: setting up uncreated NDIS PDO
> [sfcbus] bus_setup_ndis_pdo: exported NDIS interface for port 1
> [sfcbus] bus_d0_entry_post_interrupt: END
>
> And here’s the restart after the rebalance:
>
> PNPFILTR: Received IRP_MN_START_DEVICE for stack with PDO 0x84472B98
> [sfcbus] bus_prepare_hardware: START
> PNPFILTR: Received IRP_MN_QUERY_CAPABILITIES which I am simply passing
> down
> PNPFILTR: Received IRP_MN_READ_CONFIG which I am simply passing down
> 00000000 2419 0307 4705 1000 0100 0002 1000 8000 $…G…
> 00000010 0140 0000 0000 0000 0c00 fece 0000 0000 .@…
> 00000020 0000 0000 0000 0000 0000 0000 2419 0100 …$…
> 00000030 0000 0000 4000 0000 0000 0000 0001 0000 …@…
> [sfcbus] resource[0] port: 4000(4000)+100(100)
> [sfcbus] resource[1] private 1 0 0
> [sfcbus] resource[2] memory: cefe0000(cefe0000)+20000(20000)
> [sfcbus] resource[3] private 1 2 0
> [sfcbus] resource[4] interrupt: L 80000(9) V fffffffc(a8) A 0(3)
> [sfcbus] bus_setup_or_check_interrupts: START
> [sfcbus] bus_calc_msi_intrs: INFO: Duplicate MSI message number: 0
> [sfcbus] bus_calc_msi_intrs: INFO: Duplicate MSI message number: 0
> [sfcbus] bus_calc_msi_intrs: INFO: Duplicate MSI message number: 0
> [sfcbus] bus_print_interrupt_info: START Interrupt config during prepare
> hardware:
> [sfcbus] bus_print_interrupt_info: Idx: 0 MsgNum: 0x0 Vector: 0xa8 Irql:
> 9
> [sfcbus] bus_print_interrupt_info: Mode: Latched Polarity:
> WdfInterruptPolarityUnknown
> [sfcbus] bus_print_interrupt_info: MsgSignalled: Yes ShareDisposition:
> CmResourceShareShared
> [sfcbus] bus_print_interrupt_info: Idx: 1 MsgNum: 0x0 Vector: 0xa8 Irql:
> 9
> [sfcbus] bus_print_interrupt_info: Mode: Latched Polarity:
> WdfInterruptPolarityUnknown
> [sfcbus] bus_print_interrupt_info: MsgSignalled: Yes ShareDisposition:
> CmResourceShareShared
> [sfcbus] bus_print_interrupt_info: Idx: 2 MsgNum: 0x0 Vector: 0xa8 Irql:
> 9
> [sfcbus] bus_print_interrupt_info: Mode: Latched Polarity:
> WdfInterruptPolarityUnknown
> [sfcbus] bus_print_interrupt_info: MsgSignalled: Yes ShareDisposition:
> CmResourceShareShared
> [sfcbus] bus_print_interrupt_info: Idx: 3 MsgNum: 0x0 Vector: 0xa8 Irql:
> 9
> [sfcbus] bus_print_interrupt_info: Mode: Latched Polarity:
> WdfInterruptPolarityUnknown
> [sfcbus] bus_print_interrupt_info: MsgSignalled: Yes ShareDisposition:
> CmResourceShareShared
> [sfcbus] bus_calc_msi_intrs: INFO: Duplicate MSI message number: 0
> [sfcbus] bus_calc_msi_intrs: INFO: Duplicate MSI message number: 0
> [sfcbus] bus_calc_msi_intrs: INFO: Duplicate MSI message number: 0
> [sfcbus] bus_print_interrupt_info: Total interrupts: 4 MSI interrupts: 1
> [sfcbus] bus_print_interrupt_info: END
> [sfcbus] bus_setup_or_check_interrupts: END
> [sfcbus] bus_prepare_hardware: END
> [sfcbus] bus_d0_entry: START
> PNPFILTR: Received IRP_MN_QUERY_INTERFACE which I am simply passing down
> PNPFILTR: Received IRP_MN_QUERY_INTERFACE which I am simply passing down
> [sfcbus] bus_d0_entry: SUCCESS
> [sfcbus] bus_d0_entry_post_interrupt: START
> [sfcbus] bus_setup_or_check_interrupts: START
> [sfcbus] bus_setup_or_check_interrupts: END
> [sfcbus] falcon_intr_probe: NET
> [sfcbus] falcon_intr_init: NET
> [sfcbus] falcon_intr_status: NET 0x00000000
> [sfcbus] falcon_intr_status: NET 0x00000000
> [sfcbus] falcon_intr_status: NET 0x00000000
> [sfcbus] falcon_intr_status: NET 0x00000000
>
> I then get lots of “falcon_intr_status” messages, indicating that the ISR
> is being called repeatedly. If I then turn off debug, I wait a few
> seconds, and then get:
>
> Assertion failure - code c0000420 (first chance)
> nt!KeUpdateRunTime+0x248:
> 81867a71 cd2c int 2Ch
>
> I then use !pcr to check the DPC queues, and find:
>
> DpcQueue: 0x85deedc8 0x8a4d1e9d [Normal] USBPORT!USBPORT_IsrDpc
> 0x8463de24 0x81d0a5f3 [Normal] Wdf01000!FxDpc::FxDpcThunk
> 0x84dcad8c 0x81c8c758 [Normal] acpi!ACPIInterruptServiceRoutineDPC
> 0x85d26dc8 0x8a4d1e9d [Normal] USBPORT!USBPORT_IsrDpc
> 0x85e8e604 0x822011c7 [Normal] ndis!ndisInterruptDpc
>
> So I then do:
>
> 0: kd> bp Wdf01000!FxDpc::FxDpcThunk
> 0: kd> bl
> 0 e 81d0a5f3 0001 (0001) Wdf01000!FxDpc::FxDpcThunk
>
> 0: kd> g
>
> But I never hit the breakpoint…
>
> MH.
>
>

Jake Oshins wrote:

When the error occurs, type the following in the debugger:

kb
!acpiirqarb
!idt
!arbiter 4

Then post the results.

0: kd> kb
ChildEBP RetAddr Args to Child
818e9c60 81d21a1b 7a207498 00000000 00000000 sfcbus!bus_interrupt_isr
[c:\mch_sandbox\v5\build\falcon_x86_wlh\driver\win\bus\bus_driver.c @ 1646]
818e9c70 81837050 8446f280 85df8b60 ffdf0018
Wdf01000!FxInterrupt::_InterruptThunk+0x22
818e9c9c 81836fc9 8404a608 000000a8 818e9d40 nt!KiChainedDispatch2ndLvl+0x44
818e9c9c 81b983e2 8404a608 000000a8 818e9d40 nt!KiChainedDispatch+0x29
818e9d1c 81b9b3b8 840a6ad0 818efac0 818ec702 hal!HalpGenerateInterrupt+0x2ae
818e9d40 81b9b50f 818ec700 00000002 818eff00
hal!HalpLowerIrqlHardwareInterrupts+0x100
818e9d50 81837b5f 00000000 0000000e 00000000 hal!KfLowerIrql+0x5b
818e9d54 00000000 0000000e 00000000 00000000 nt!KiIdleLoop+0xe7
0: kd> !acpiirqarb

Processor (0x0):
Device Object: 00000000
Current IDT Allocation:
0000000000000000 - 000000000000004f 00000000
A:00000000 IRQ:0
0000000000000051 - 0000000000000051 D 8446c428 A:00000000 IRQ:0
0000000000000061 - 0000000000000061 D 8446c658 A:00000000 IRQ:0
0000000000000062 - 0000000000000062 S B 84058030 (usbuhci)
A:00000000 IRQ:0
0000000000000071 - 0000000000000071 D 8446c770 A:00000000 IRQ:0
0000000000000072 - 0000000000000072 S B 84058b98 (usbehci)
A:00000000 IRQ:0
0000000000000081 - 0000000000000081 D 8446ce00 (Serial)
A:00000000 IRQ:0
0000000000000082 - 0000000000000082 S B 8447c5a8 (LSI_SCSI)
A:00000000 IRQ:0
0000000000000092 - 0000000000000092 D 84dcb888 (atapi)
A:00000000 IRQ:0
00000000000000a0 - 00000000000000a0 D 84476b98 (pci)
A:00000000 IRQ:0
00000000000000a2 - 00000000000000a2 D 8447d6c8 (atapi)
A:00000000 IRQ:0
00000000000000a8 - 00000000000000af D 8446e268 (SFCBUS)
A:00000000 IRQ:0
00000000000000b0 - 00000000000000b0 D 84476030 (pci)
A:00000000 IRQ:0
00000000000000b1 - 00000000000000b1 S B 84049600 (ACPI)
A:00000000 IRQ:0
00000000000000b2 - 00000000000000b2 S
00000000000000b2 - 00000000000000b2 S B 84056030 (pci)
A:00000000 IRQ:0
00000000000000b2 - 00000000000000b2 S B 84056b98 (pci)
A:00000000 IRQ:0
00000000000000b2 - 00000000000000b2 S B 84056700 (pci)
A:00000000 IRQ:0
00000000000000b2 - 00000000000000b2 S B 84057030 (pci)
A:00000000 IRQ:0
00000000000000b2 - 00000000000000b2 S B 84478b98 (b57nd60x)
A:00000000 IRQ:0
00000000000000b2 - 00000000000000b2 S B 84478700 (b57nd60x)
A:00000000 IRQ:0
00000000000000b2 - 00000000000000b2 S B 84057700 (usbuhci)
A:00000000 IRQ:0
00000000000000bf - ffffffffffffffff 00000000
A:00000000 IRQ:0

Possible IDT Allocation:
< none >

Processor (0x1):
Device Object: 00000000
Current IDT Allocation:
0000000000000000 - 000000000000004f 00000000
A:00000000 IRQ:0
0000000000000051 - 0000000000000051 D 8446c428 A:00000000 IRQ:0
0000000000000061 - 0000000000000061 D 8446c658 A:00000000 IRQ:0
0000000000000062 - 0000000000000062 S B 84058030 (usbuhci)
A:00000000 IRQ:0
0000000000000071 - 0000000000000071 D 8446c770 A:00000000 IRQ:0
0000000000000072 - 0000000000000072 S B 84058b98 (usbehci)
A:00000000 IRQ:0
0000000000000081 - 0000000000000081 D 8446ce00 (Serial)
A:00000000 IRQ:0
0000000000000082 - 0000000000000082 S B 8447c5a8 (LSI_SCSI)
A:00000000 IRQ:0
0000000000000092 - 0000000000000092 D 84dcb888 (atapi)
A:00000000 IRQ:0
00000000000000a0 - 00000000000000a0 D 84476b98 (pci)
A:00000000 IRQ:0
00000000000000a2 - 00000000000000a2 D 8447d6c8 (atapi)
A:00000000 IRQ:0
00000000000000a8 - 00000000000000af D 8446e268 (SFCBUS)
A:00000000 IRQ:0
00000000000000b0 - 00000000000000b0 D 84476030 (pci)
A:00000000 IRQ:0
00000000000000b1 - 00000000000000b1 S B 84049600 (ACPI)
A:00000000 IRQ:0
00000000000000b2 - 00000000000000b2 S
00000000000000b2 - 00000000000000b2 S B 84056030 (pci)
A:00000000 IRQ:0
00000000000000b2 - 00000000000000b2 S B 84056b98 (pci)
A:00000000 IRQ:0
00000000000000b2 - 00000000000000b2 S B 84056700 (pci)
A:00000000 IRQ:0
00000000000000b2 - 00000000000000b2 S B 84057030 (pci)
A:00000000 IRQ:0
00000000000000b2 - 00000000000000b2 S B 84478b98 (b57nd60x)
A:00000000 IRQ:0
00000000000000b2 - 00000000000000b2 S B 84478700 (b57nd60x)
A:00000000 IRQ:0
00000000000000b2 - 00000000000000b2 S B 84057700 (usbuhci)
A:00000000 IRQ:0
00000000000000bf - ffffffffffffffff 00000000
A:00000000 IRQ:0

Possible IDT Allocation:
< none >

Interrupt Controller (Inputs: 0x0-0x17 Dev: 0000000000000000):
(00)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(01)Cur:IDT-a1 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(02)Cur:IDT-71 Ref-1 edg hi Pos:IDT-00 Ref-0 edg hi
(03)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(04)Cur:IDT-81 Ref-1 edg hi Pos:IDT-00 Ref-0 edg hi
(05)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(06)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(07)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(08)Cur:IDT-61 Ref-1 edg hi Pos:IDT-00 Ref-0 edg hi
(09)Cur:IDT-b1 Ref-1 lev hi Pos:IDT-00 Ref-0 edg hi
(0a)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(0b)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(0c)Cur:IDT-91 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(0d)Cur:IDT-51 Ref-1 edg hi Pos:IDT-00 Ref-0 edg hi
(0e)Cur:IDT-a2 Ref-1 edg hi Pos:IDT-00 Ref-0 edg hi
(0f)Cur:IDT-92 Ref-1 edg hi Pos:IDT-00 Ref-0 edg hi
(10)Cur:IDT-b2 Ref-7 lev low Pos:IDT-00 Ref-0 edg hi
(11)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(12)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(13)Cur:IDT-62 Ref-1 lev low Pos:IDT-00 Ref-0 edg hi
(14)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(15)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(16)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(17)Cur:IDT-72 Ref-1 lev low Pos:IDT-00 Ref-0 edg hi

Interrupt Controller (Inputs: 0x18-0x2f Dev: 0000000000000000):
(00)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(01)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(02)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(03)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(04)Cur:IDT-82 Ref-1 lev low Pos:IDT-00 Ref-0 edg hi
(05)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(06)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(07)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(08)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(09)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(0a)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(0b)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(0c)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(0d)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(0e)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(0f)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(10)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(11)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(12)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(13)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(14)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(15)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(16)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(17)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi

Interrupt Controller (Inputs: 0x30-0x47 Dev: 0000000000000000):
(00)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(01)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(02)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(03)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(04)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(05)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(06)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(07)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(08)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(09)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(0a)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(0b)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(0c)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(0d)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(0e)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(0f)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(10)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(11)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(12)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(13)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(14)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(15)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(16)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
(17)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi

Link Node: LP00
Current IRQ: 0x0 - 0 reference(s)
Possible IRQ: 0x0 - 0 reference(s)
Preferred IRQ: 0xffffffff - ResourceOverride (IO_List) 0000000000000000

Link Node: LP02
Current IRQ: 0x0 - 0 reference(s)
Possible IRQ: 0x0 - 0 reference(s)
Preferred IRQ: 0xffffffff - ResourceOverride (IO_List) 0000000000000000

Link Node: LP01
Current IRQ: 0x0 - 0 reference(s)
Possible IRQ: 0x0 - 0 reference(s)
Preferred IRQ: 0xffffffff - ResourceOverride (IO_List) 0000000000000000

Link Node: LP03
Current IRQ: 0x0 - 0 reference(s)
Possible IRQ: 0x0 - 0 reference(s)
Preferred IRQ: 0xffffffff - ResourceOverride (IO_List) 0000000000000000

Link Node: LP04
Current IRQ: 0x0 - 0 reference(s)
Possible IRQ: 0x0 - 0 reference(s)
Preferred IRQ: 0xffffffff - ResourceOverride (IO_List) 0000000000000000

Link Node: LP05
Current IRQ: 0x0 - 0 reference(s)
Possible IRQ: 0x0 - 0 reference(s)
Preferred IRQ: 0xffffffff - ResourceOverride (IO_List) 0000000000000000

Link Node: LP06
Current IRQ: 0x0 - 0 reference(s)
Possible IRQ: 0x0 - 0 reference(s)
Preferred IRQ: 0xffffffff - ResourceOverride (IO_List) 0000000000000000

Link Node: LP07
Current IRQ: 0x0 - 0 reference(s)
Possible IRQ: 0x0 - 0 reference(s)
Preferred IRQ: 0xffffffff - ResourceOverride (IO_List) 0000000000000000

0: kd> !idt

Dumping IDT:

37: 81ba90e8 hal!PicSpuriousService37
62: 85e07050 USBPORT!USBPORT_InterruptService (KINTERRUPT 85e07000)
72: 863bdcd0 USBPORT!USBPORT_InterruptService (KINTERRUPT 863bdc80)
81: 863bd7d0 serial!SerialCIsrSw (KINTERRUPT 863bd780)
82: 8446f550 storport!RaidpAdapterInterruptRoutine (KINTERRUPT 8446f500)
92: 8446f7d0 ataport!IdePortInterrupt (KINTERRUPT 8446f780)
a2: 8446fa50 ataport!IdePortInterrupt (KINTERRUPT 8446fa00)
a8: 8446f2d0 Wdf01000!FxInterrupt::_InterruptThunk (KINTERRUPT 8446f280)
Wdf01000!FxInterrupt::_InterruptThunk (KINTERRUPT 8446f000)
Wdf01000!FxInterrupt::_InterruptThunk (KINTERRUPT 85e07c80)
Wdf01000!FxInterrupt::_InterruptThunk (KINTERRUPT 85e07a00)
b1: 8446fcd0 acpi!ACPIInterruptServiceRoutine (KINTERRUPT 8446fc80)
b2: 85e077d0 ndis!ndisMiniportIsr (KINTERRUPT 85e07780)
ndis!ndisMiniportIsr (KINTERRUPT 85e07500)
USBPORT!USBPORT_InterruptService (KINTERRUPT 85e07280)
c1: 81ba93d8 hal!HalpBroadcastCallService
d1: 81b98614 hal!HalpRtcClockInterrupt
df: 81ba91c0 hal!HalpApicRebootService
e1: 81ba9934 hal!HalpIpiHandler
e3: 81ba96d4 hal!HalpLocalApicErrorService
fd: 81ba9edc hal!HalpProfileInterrupt

0: kd> !arbiter 4

DEVNODE 8403e3c0 (HTREE\ROOT\0)
Interrupt Arbiter “RootIRQ” at 819243e0
Allocated ranges:
0000000000000000 - 0000000000000000 B 84040db0
0000000000000001 - 0000000000000001 B 84040db0
0000000000000002 - 0000000000000002 B 84040db0
0000000000000003 - 0000000000000003 B 84040db0
0000000000000004 - 0000000000000004 B 84040db0
0000000000000005 - 0000000000000005 B 84040db0
0000000000000006 - 0000000000000006 B 84040db0
0000000000000007 - 0000000000000007 B 84040db0
0000000000000008 - 0000000000000008 B 84040db0
0000000000000009 - 0000000000000009 B 84040db0
000000000000000a - 000000000000000a B 84040db0
000000000000000b - 000000000000000b B 84040db0
000000000000000c - 000000000000000c B 84040db0
000000000000000d - 000000000000000d B 84040db0
000000000000000e - 000000000000000e B 84040db0
000000000000000f - 000000000000000f B 84040db0
0000000000000010 - 0000000000000010 B 84040db0
0000000000000011 - 0000000000000011 B 84040db0
0000000000000012 - 0000000000000012 B 84040db0
0000000000000013 - 0000000000000013 B 84040db0
0000000000000014 - 0000000000000014 B 84040db0
0000000000000015 - 0000000000000015 B 84040db0
0000000000000016 - 0000000000000016 B 84040db0
0000000000000017 - 0000000000000017 B 84040db0
0000000000000018 - 0000000000000018 B 84040db0
0000000000000019 - 0000000000000019 B 84040db0
000000000000001a - 000000000000001a B 84040db0
000000000000001b - 000000000000001b B 84040db0
000000000000001c - 000000000000001c B 84040db0
000000000000001d - 000000000000001d B 84040db0
000000000000001e - 000000000000001e B 84040db0
000000000000001f - 000000000000001f B 84040db0
0000000000000020 - 0000000000000020 B 84040db0
0000000000000021 - 0000000000000021 B 84040db0
0000000000000022 - 0000000000000022 B 84040db0
0000000000000023 - 0000000000000023 B 84040db0
0000000000000024 - 0000000000000024 B 84040db0
0000000000000025 - 0000000000000025 B 84040db0
0000000000000026 - 0000000000000026 B 84040db0
0000000000000027 - 0000000000000027 B 84040db0
0000000000000028 - 0000000000000028 B 84040db0
0000000000000029 - 0000000000000029 B 84040db0
000000000000002a - 000000000000002a B 84040db0
000000000000002b - 000000000000002b B 84040db0
000000000000002c - 000000000000002c B 84040db0
000000000000002d - 000000000000002d B 84040db0
000000000000002e - 000000000000002e B 84040db0
000000000000002f - 000000000000002f B 84040db0
0000000000000050 - 0000000000000050 84049600 (ACPI)
0000000000000051 - 0000000000000051 84049600 (ACPI)
0000000000000052 - 0000000000000052 84049600 (ACPI)
0000000000000053 - 0000000000000053 84049600 (ACPI)
0000000000000054 - 0000000000000054 84049600 (ACPI)
0000000000000055 - 0000000000000055 84049600 (ACPI)
0000000000000056 - 0000000000000056 84049600 (ACPI)
0000000000000057 - 0000000000000057 84049600 (ACPI)
0000000000000058 - 0000000000000058 84049600 (ACPI)
0000000000000059 - 0000000000000059 84049600 (ACPI)
000000000000005a - 000000000000005a 84049600 (ACPI)
000000000000005b - 000000000000005b 84049600 (ACPI)
000000000000005c - 000000000000005c 84049600 (ACPI)
000000000000005d - 000000000000005d 84049600 (ACPI)
000000000000005e - 000000000000005e 84049600 (ACPI)
000000000000005f - 000000000000005f 84049600 (ACPI)
0000000000000060 - 0000000000000060 84049600 (ACPI)
0000000000000061 - 0000000000000061 84049600 (ACPI)
0000000000000062 - 0000000000000062 84049600 (ACPI)
0000000000000063 - 0000000000000063 84049600 (ACPI)
0000000000000064 - 0000000000000064 84049600 (ACPI)
0000000000000065 - 0000000000000065 84049600 (ACPI)
0000000000000066 - 0000000000000066 84049600 (ACPI)
0000000000000067 - 0000000000000067 84049600 (ACPI)
0000000000000068 - 0000000000000068 84049600 (ACPI)
0000000000000069 - 0000000000000069 84049600 (ACPI)
000000000000006a - 000000000000006a 84049600 (ACPI)
000000000000006b - 000000000000006b 84049600 (ACPI)
000000000000006c - 000000000000006c 84049600 (ACPI)
000000000000006d - 000000000000006d 84049600 (ACPI)
000000000000006e - 000000000000006e 84049600 (ACPI)
000000000000006f - 000000000000006f 84049600 (ACPI)
0000000000000070 - 0000000000000070 84049600 (ACPI)
0000000000000071 - 0000000000000071 84049600 (ACPI)
0000000000000072 - 0000000000000072 84049600 (ACPI)
0000000000000073 - 0000000000000073 84049600 (ACPI)
0000000000000074 - 0000000000000074 84049600 (ACPI)
0000000000000075 - 0000000000000075 84049600 (ACPI)
0000000000000076 - 0000000000000076 84049600 (ACPI)
0000000000000077 - 0000000000000077 84049600 (ACPI)
0000000000000078 - 0000000000000078 84049600 (ACPI)
0000000000000079 - 0000000000000079 84049600 (ACPI)
000000000000007a - 000000000000007a 84049600 (ACPI)
000000000000007b - 000000000000007b 84049600 (ACPI)
000000000000007c - 000000000000007c 84049600 (ACPI)
000000000000007d - 000000000000007d 84049600 (ACPI)
000000000000007e - 000000000000007e 84049600 (ACPI)
000000000000007f - 000000000000007f 84049600 (ACPI)
0000000000000080 - 0000000000000080 84049600 (ACPI)
0000000000000081 - 0000000000000081 84049600 (ACPI)
0000000000000082 - 0000000000000082 84049600 (ACPI)
0000000000000083 - 0000000000000083 84049600 (ACPI)
0000000000000084 - 0000000000000084 84049600 (ACPI)
0000000000000085 - 0000000000000085 84049600 (ACPI)
0000000000000086 - 0000000000000086 84049600 (ACPI)
0000000000000087 - 0000000000000087 84049600 (ACPI)
0000000000000088 - 0000000000000088 84049600 (ACPI)
0000000000000089 - 0000000000000089 84049600 (ACPI)
000000000000008a - 000000000000008a 84049600 (ACPI)
000000000000008b - 000000000000008b 84049600 (ACPI)
000000000000008c - 000000000000008c 84049600 (ACPI)
000000000000008d - 000000000000008d 84049600 (ACPI)
000000000000008e - 000000000000008e 84049600 (ACPI)
000000000000008f - 000000000000008f 84049600 (ACPI)
0000000000000090 - 0000000000000090 84049600 (ACPI)
0000000000000091 - 0000000000000091 84049600 (ACPI)
0000000000000092 - 0000000000000092 84049600 (ACPI)
0000000000000093 - 0000000000000093 84049600 (ACPI)
0000000000000094 - 0000000000000094 84049600 (ACPI)
0000000000000095 - 0000000000000095 84049600 (ACPI)
0000000000000096 - 0000000000000096 84049600 (ACPI)
0000000000000097 - 0000000000000097 84049600 (ACPI)
0000000000000098 - 0000000000000098 84049600 (ACPI)
0000000000000099 - 0000000000000099 84049600 (ACPI)
000000000000009a - 000000000000009a 84049600 (ACPI)
000000000000009b - 000000000000009b 84049600 (ACPI)
000000000000009c - 000000000000009c 84049600 (ACPI)
000000000000009d - 000000000000009d 84049600 (ACPI)
000000000000009e - 000000000000009e 84049600 (ACPI)
000000000000009f - 000000000000009f 84049600 (ACPI)
00000000000000a0 - 00000000000000a0 84049600 (ACPI)
00000000000000a1 - 00000000000000a1 84049600 (ACPI)
00000000000000a2 - 00000000000000a2 84049600 (ACPI)
00000000000000a3 - 00000000000000a3 84049600 (ACPI)
00000000000000a4 - 00000000000000a4 84049600 (ACPI)
00000000000000a5 - 00000000000000a5 84049600 (ACPI)
00000000000000a6 - 00000000000000a6 84049600 (ACPI)
00000000000000a7 - 00000000000000a7 84049600 (ACPI)
00000000000000a8 - 00000000000000a8 84049600 (ACPI)
00000000000000a9 - 00000000000000a9 84049600 (ACPI)
00000000000000aa - 00000000000000aa 84049600 (ACPI)
00000000000000ab - 00000000000000ab 84049600 (ACPI)
00000000000000ac - 00000000000000ac 84049600 (ACPI)
00000000000000ad - 00000000000000ad 84049600 (ACPI)
00000000000000ae - 00000000000000ae 84049600 (ACPI)
00000000000000af - 00000000000000af 84049600 (ACPI)
00000000000000b0 - 00000000000000b0 84049600 (ACPI)
00000000000000b1 - 00000000000000b1 84049600 (ACPI)
00000000000000b2 - 00000000000000b2 84049600 (ACPI)
00000000000000b3 - 00000000000000b3 84049600 (ACPI)
00000000000000b4 - 00000000000000b4 84049600 (ACPI)
00000000000000b5 - 00000000000000b5 84049600 (ACPI)
00000000000000b6 - 00000000000000b6 84049600 (ACPI)
00000000000000b7 - 00000000000000b7 84049600 (ACPI)
00000000000000b8 - 00000000000000b8 84049600 (ACPI)
00000000000000b9 - 00000000000000b9 84049600 (ACPI)
00000000000000ba - 00000000000000ba 84049600 (ACPI)
00000000000000bb - 00000000000000bb 84049600 (ACPI)
00000000000000bc - 00000000000000bc 84049600 (ACPI)
00000000000000bd - 00000000000000bd 84049600 (ACPI)
00000000000000be - 00000000000000be 84049600 (ACPI)
00000000000000ff - 00000000000000ff B 84040db0
Possible allocation:
< none >

DEVNODE 84db0aa8 (ACPI_HAL\PNP0C08\0)
Interrupt Arbiter “ACPI_IRQ” at 81ca7f00
Allocated ranges:
0000000000000002 - 0000000000000002 B 8446c770
0000000000000004 - 0000000000000004 8446ce00 (Serial)
0000000000000008 - 0000000000000008 8446c658
0000000000000009 - 0000000000000009 S 84049600 (ACPI)
000000000000000d - 000000000000000d B 8446c428
000000000000000e - 000000000000000e 8447d6c8 (atapi)
000000000000000f - 000000000000000f 84dcb888 (atapi)
0000000000000010 - 0000000000000010 S
0000000000000010 - 0000000000000010 S 84056030 (pci)
0000000000000010 - 0000000000000010 S 84056b98 (pci)
0000000000000010 - 0000000000000010 S 84056700 (pci)
0000000000000010 - 0000000000000010 S 84057030 (pci)
0000000000000010 - 0000000000000010 S 84478b98 (b57nd60x)
0000000000000010 - 0000000000000010 S 84478700 (b57nd60x)
0000000000000010 - 0000000000000010 S 84057700 (usbuhci)
0000000000000013 - 0000000000000013 S 84058030 (usbuhci)
0000000000000017 - 0000000000000017 S 84058b98 (usbehci)
000000000000001c - 000000000000001c S 8447c5a8 (LSI_SCSI)
00000000fffffffc - 00000000fffffffc 8446e268 (SFCBUS)
00000000fffffffd - 00000000fffffffd 84476b98 (pci)
00000000fffffffe - 00000000fffffffe 84476030 (pci)
Possible allocation:
< none >

From looking that this, I believe that your problem is that one or more of
your ISRs always returns “TRUE.”

Remember the protocol for shared interrupts. It differs for edge- and
level-triggered interrupts. For level-triggered interrupts, you can
guarantee that you never miss calling the correct ISR if you dismiss the
interrupt at the local APIC after you find one ISR that returns “TRUE” or
when you hit the end of the ISR chain. If the interrupt is still asserted,
then the I/O APIC will pick it up again and send another message to the
processor telling the processor to jump back through the Interrupt
Descriptor Table (IDT) and you’ll run the ISR chain again.

But with edge-triggered interrupts, the protocol is more complicated.
You’ll never get another interrupt if you fail to call the right ISR at the
right time. So the NT kernel calls every ISR in the chain (when an
edge-triggered vector is shared) repeatedly until every single ISR in the
chain returns FALSE. This guarantees that an interrupt that comes in while
the ISR chain is being run won’t be masked by an EOI.

In your case, I have two suggestions:

  1. Re-write your ISRs so that they only return true when your device
    actually triggered an interrupt. This should involve checking in-memory
    structures that were put there by the DMA engine of your device before the
    interrupt was triggered. (Two sub-points here: You can be guaranteed that
    these will be coherent in memory because the MSI itself is a DMA transaction
    and one can’t pass the other. Also, you might be tempted to poll a register
    on your device to see what happened. If you do, you might as well shut off
    MSI. There’s not much value in it if you have to touch your device to find
    out what happened.)

  2. Only register one ISR if your device has only one vector allocated to
    it. This allows the kernel to ignore the return value of your ISR.

Either one will get your driver working. Ultimately, the first one is much
more correct and probably easier to code up, since WDF is doing the
interrupt registration for you at the moment. So start with #1. If for
some reason, it becomes impossible to correctly determine whether your
device interrupted, then go for #2.

  • Jake Oshins
    Windows Kernel Team

“Martin Harvey” wrote in message
news:xxxxx@ntdev…
> Jake Oshins wrote:
>
>>When the error occurs, type the following in the debugger:
>>
>>kb
>>!acpiirqarb
>>!idt
>>!arbiter 4
>>
>>Then post the results.
>>
>>
>
> 0: kd> kb
> ChildEBP RetAddr Args to Child 818e9c60 81d21a1b 7a207498
> 00000000 00000000 sfcbus!bus_interrupt_isr
> [c:\mch_sandbox\v5\build\falcon_x86_wlh\driver\win\bus\bus_driver.c @
> 1646]
> 818e9c70 81837050 8446f280 85df8b60 ffdf0018
> Wdf01000!FxInterrupt::_InterruptThunk+0x22
> 818e9c9c 81836fc9 8404a608 000000a8 818e9d40
> nt!KiChainedDispatch2ndLvl+0x44
> 818e9c9c 81b983e2 8404a608 000000a8 818e9d40 nt!KiChainedDispatch+0x29
> 818e9d1c 81b9b3b8 840a6ad0 818efac0 818ec702
> hal!HalpGenerateInterrupt+0x2ae
> 818e9d40 81b9b50f 818ec700 00000002 818eff00
> hal!HalpLowerIrqlHardwareInterrupts+0x100
> 818e9d50 81837b5f 00000000 0000000e 00000000 hal!KfLowerIrql+0x5b
> 818e9d54 00000000 0000000e 00000000 00000000 nt!KiIdleLoop+0xe7
> 0: kd> !acpiirqarb
>
>
> Processor (0x0):
> Device Object: 00000000
> Current IDT Allocation:
> 0000000000000000 - 000000000000004f 00000000
> A:00000000 IRQ:0
> 0000000000000051 - 0000000000000051 D 8446c428 A:00000000 IRQ:0
> 0000000000000061 - 0000000000000061 D 8446c658 A:00000000 IRQ:0
> 0000000000000062 - 0000000000000062 S B 84058030 (usbuhci)
> A:00000000 IRQ:0
> 0000000000000071 - 0000000000000071 D 8446c770 A:00000000 IRQ:0
> 0000000000000072 - 0000000000000072 S B 84058b98 (usbehci)
> A:00000000 IRQ:0
> 0000000000000081 - 0000000000000081 D 8446ce00 (Serial)
> A:00000000 IRQ:0
> 0000000000000082 - 0000000000000082 S B 8447c5a8 (LSI_SCSI)
> A:00000000 IRQ:0
> 0000000000000092 - 0000000000000092 D 84dcb888 (atapi) A:00000000
> IRQ:0
> 00000000000000a0 - 00000000000000a0 D 84476b98 (pci) A:00000000
> IRQ:0
> 00000000000000a2 - 00000000000000a2 D 8447d6c8 (atapi) A:00000000
> IRQ:0
> 00000000000000a8 - 00000000000000af D 8446e268 (SFCBUS)
> A:00000000 IRQ:0
> 00000000000000b0 - 00000000000000b0 D 84476030 (pci) A:00000000
> IRQ:0
> 00000000000000b1 - 00000000000000b1 S B 84049600 (ACPI) A:00000000
> IRQ:0
> 00000000000000b2 - 00000000000000b2 S 00000000000000b2 -
> 00000000000000b2 S B 84056030 (pci) A:00000000 IRQ:0
> 00000000000000b2 - 00000000000000b2 S B 84056b98 (pci) A:00000000
> IRQ:0
> 00000000000000b2 - 00000000000000b2 S B 84056700 (pci) A:00000000
> IRQ:0
> 00000000000000b2 - 00000000000000b2 S B 84057030 (pci) A:00000000
> IRQ:0
> 00000000000000b2 - 00000000000000b2 S B 84478b98 (b57nd60x)
> A:00000000 IRQ:0
> 00000000000000b2 - 00000000000000b2 S B 84478700 (b57nd60x)
> A:00000000 IRQ:0
> 00000000000000b2 - 00000000000000b2 S B 84057700 (usbuhci)
> A:00000000 IRQ:0
> 00000000000000bf - ffffffffffffffff 00000000
> A:00000000 IRQ:0
>
> Possible IDT Allocation:
> < none >
>
>
> Processor (0x1):
> Device Object: 00000000
> Current IDT Allocation:
> 0000000000000000 - 000000000000004f 00000000
> A:00000000 IRQ:0
> 0000000000000051 - 0000000000000051 D 8446c428 A:00000000 IRQ:0
> 0000000000000061 - 0000000000000061 D 8446c658 A:00000000 IRQ:0
> 0000000000000062 - 0000000000000062 S B 84058030 (usbuhci)
> A:00000000 IRQ:0
> 0000000000000071 - 0000000000000071 D 8446c770 A:00000000 IRQ:0
> 0000000000000072 - 0000000000000072 S B 84058b98 (usbehci)
> A:00000000 IRQ:0
> 0000000000000081 - 0000000000000081 D 8446ce00 (Serial)
> A:00000000 IRQ:0
> 0000000000000082 - 0000000000000082 S B 8447c5a8 (LSI_SCSI)
> A:00000000 IRQ:0
> 0000000000000092 - 0000000000000092 D 84dcb888 (atapi) A:00000000
> IRQ:0
> 00000000000000a0 - 00000000000000a0 D 84476b98 (pci) A:00000000
> IRQ:0
> 00000000000000a2 - 00000000000000a2 D 8447d6c8 (atapi) A:00000000
> IRQ:0
> 00000000000000a8 - 00000000000000af D 8446e268 (SFCBUS)
> A:00000000 IRQ:0
> 00000000000000b0 - 00000000000000b0 D 84476030 (pci) A:00000000
> IRQ:0
> 00000000000000b1 - 00000000000000b1 S B 84049600 (ACPI) A:00000000
> IRQ:0
> 00000000000000b2 - 00000000000000b2 S 00000000000000b2 -
> 00000000000000b2 S B 84056030 (pci) A:00000000 IRQ:0
> 00000000000000b2 - 00000000000000b2 S B 84056b98 (pci) A:00000000
> IRQ:0
> 00000000000000b2 - 00000000000000b2 S B 84056700 (pci) A:00000000
> IRQ:0
> 00000000000000b2 - 00000000000000b2 S B 84057030 (pci) A:00000000
> IRQ:0
> 00000000000000b2 - 00000000000000b2 S B 84478b98 (b57nd60x)
> A:00000000 IRQ:0
> 00000000000000b2 - 00000000000000b2 S B 84478700 (b57nd60x)
> A:00000000 IRQ:0
> 00000000000000b2 - 00000000000000b2 S B 84057700 (usbuhci)
> A:00000000 IRQ:0
> 00000000000000bf - ffffffffffffffff 00000000
> A:00000000 IRQ:0
>
> Possible IDT Allocation:
> < none >
>
>
> Interrupt Controller (Inputs: 0x0-0x17 Dev: 0000000000000000):
> (00)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (01)Cur:IDT-a1 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (02)Cur:IDT-71 Ref-1 edg hi Pos:IDT-00 Ref-0 edg hi
> (03)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (04)Cur:IDT-81 Ref-1 edg hi Pos:IDT-00 Ref-0 edg hi
> (05)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (06)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (07)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (08)Cur:IDT-61 Ref-1 edg hi Pos:IDT-00 Ref-0 edg hi
> (09)Cur:IDT-b1 Ref-1 lev hi Pos:IDT-00 Ref-0 edg hi
> (0a)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (0b)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (0c)Cur:IDT-91 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (0d)Cur:IDT-51 Ref-1 edg hi Pos:IDT-00 Ref-0 edg hi
> (0e)Cur:IDT-a2 Ref-1 edg hi Pos:IDT-00 Ref-0 edg hi
> (0f)Cur:IDT-92 Ref-1 edg hi Pos:IDT-00 Ref-0 edg hi
> (10)Cur:IDT-b2 Ref-7 lev low Pos:IDT-00 Ref-0 edg hi
> (11)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (12)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (13)Cur:IDT-62 Ref-1 lev low Pos:IDT-00 Ref-0 edg hi
> (14)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (15)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (16)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (17)Cur:IDT-72 Ref-1 lev low Pos:IDT-00 Ref-0 edg hi
>
>
> Interrupt Controller (Inputs: 0x18-0x2f Dev: 0000000000000000):
> (00)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (01)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (02)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (03)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (04)Cur:IDT-82 Ref-1 lev low Pos:IDT-00 Ref-0 edg hi
> (05)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (06)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (07)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (08)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (09)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (0a)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (0b)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (0c)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (0d)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (0e)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (0f)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (10)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (11)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (12)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (13)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (14)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (15)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (16)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (17)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
>
>
> Interrupt Controller (Inputs: 0x30-0x47 Dev: 0000000000000000):
> (00)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (01)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (02)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (03)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (04)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (05)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (06)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (07)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (08)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (09)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (0a)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (0b)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (0c)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (0d)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (0e)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (0f)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (10)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (11)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (12)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (13)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (14)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (15)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (16)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
> (17)Cur:IDT-00 Ref-0 edg hi Pos:IDT-00 Ref-0 edg hi
>
> Link Node: LP00
> Current IRQ: 0x0 - 0 reference(s)
> Possible IRQ: 0x0 - 0 reference(s)
> Preferred IRQ: 0xffffffff - ResourceOverride (IO_List) 0000000000000000
>
> Link Node: LP02
> Current IRQ: 0x0 - 0 reference(s)
> Possible IRQ: 0x0 - 0 reference(s)
> Preferred IRQ: 0xffffffff - ResourceOverride (IO_List) 0000000000000000
>
> Link Node: LP01
> Current IRQ: 0x0 - 0 reference(s)
> Possible IRQ: 0x0 - 0 reference(s)
> Preferred IRQ: 0xffffffff - ResourceOverride (IO_List) 0000000000000000
>
> Link Node: LP03
> Current IRQ: 0x0 - 0 reference(s)
> Possible IRQ: 0x0 - 0 reference(s)
> Preferred IRQ: 0xffffffff - ResourceOverride (IO_List) 0000000000000000
>
> Link Node: LP04
> Current IRQ: 0x0 - 0 reference(s)
> Possible IRQ: 0x0 - 0 reference(s)
> Preferred IRQ: 0xffffffff - ResourceOverride (IO_List) 0000000000000000
>
> Link Node: LP05
> Current IRQ: 0x0 - 0 reference(s)
> Possible IRQ: 0x0 - 0 reference(s)
> Preferred IRQ: 0xffffffff - ResourceOverride (IO_List) 0000000000000000
>
> Link Node: LP06
> Current IRQ: 0x0 - 0 reference(s)
> Possible IRQ: 0x0 - 0 reference(s)
> Preferred IRQ: 0xffffffff - ResourceOverride (IO_List) 0000000000000000
>
> Link Node: LP07
> Current IRQ: 0x0 - 0 reference(s)
> Possible IRQ: 0x0 - 0 reference(s)
> Preferred IRQ: 0xffffffff - ResourceOverride (IO_List) 0000000000000000
>
> 0: kd> !idt
>
> Dumping IDT:
>
> 37: 81ba90e8 hal!PicSpuriousService37
> 62: 85e07050 USBPORT!USBPORT_InterruptService (KINTERRUPT 85e07000)
> 72: 863bdcd0 USBPORT!USBPORT_InterruptService (KINTERRUPT 863bdc80)
> 81: 863bd7d0 serial!SerialCIsrSw (KINTERRUPT 863bd780)
> 82: 8446f550 storport!RaidpAdapterInterruptRoutine (KINTERRUPT
> 8446f500)
> 92: 8446f7d0 ataport!IdePortInterrupt (KINTERRUPT 8446f780)
> a2: 8446fa50 ataport!IdePortInterrupt (KINTERRUPT 8446fa00)
> a8: 8446f2d0 Wdf01000!FxInterrupt::_InterruptThunk (KINTERRUPT
> 8446f280)
> Wdf01000!FxInterrupt::_InterruptThunk (KINTERRUPT 8446f000)
> Wdf01000!FxInterrupt::_InterruptThunk (KINTERRUPT 85e07c80)
> Wdf01000!FxInterrupt::_InterruptThunk (KINTERRUPT 85e07a00)
> b1: 8446fcd0 acpi!ACPIInterruptServiceRoutine (KINTERRUPT 8446fc80)
> b2: 85e077d0 ndis!ndisMiniportIsr (KINTERRUPT 85e07780)
> ndis!ndisMiniportIsr (KINTERRUPT 85e07500)
> USBPORT!USBPORT_InterruptService (KINTERRUPT 85e07280)
> c1: 81ba93d8 hal!HalpBroadcastCallService
> d1: 81b98614 hal!HalpRtcClockInterrupt
> df: 81ba91c0 hal!HalpApicRebootService
> e1: 81ba9934 hal!HalpIpiHandler
> e3: 81ba96d4 hal!HalpLocalApicErrorService
> fd: 81ba9edc hal!HalpProfileInterrupt
>
> 0: kd> !arbiter 4
>
> DEVNODE 8403e3c0 (HTREE\ROOT\0)
> Interrupt Arbiter “RootIRQ” at 819243e0
> Allocated ranges:
> 0000000000000000 - 0000000000000000 B 84040db0
> 0000000000000001 - 0000000000000001 B 84040db0
> 0000000000000002 - 0000000000000002 B 84040db0
> 0000000000000003 - 0000000000000003 B 84040db0
> 0000000000000004 - 0000000000000004 B 84040db0
> 0000000000000005 - 0000000000000005 B 84040db0
> 0000000000000006 - 0000000000000006 B 84040db0
> 0000000000000007 - 0000000000000007 B 84040db0
> 0000000000000008 - 0000000000000008 B 84040db0
> 0000000000000009 - 0000000000000009 B 84040db0
> 000000000000000a - 000000000000000a B 84040db0
> 000000000000000b - 000000000000000b B 84040db0
> 000000000000000c - 000000000000000c B 84040db0
> 000000000000000d - 000000000000000d B 84040db0
> 000000000000000e - 000000000000000e B 84040db0
> 000000000000000f - 000000000000000f B 84040db0
> 0000000000000010 - 0000000000000010 B 84040db0
> 0000000000000011 - 0000000000000011 B 84040db0
> 0000000000000012 - 0000000000000012 B 84040db0
> 0000000000000013 - 0000000000000013 B 84040db0
> 0000000000000014 - 0000000000000014 B 84040db0
> 0000000000000015 - 0000000000000015 B 84040db0
> 0000000000000016 - 0000000000000016 B 84040db0
> 0000000000000017 - 0000000000000017 B 84040db0
> 0000000000000018 - 0000000000000018 B 84040db0
> 0000000000000019 - 0000000000000019 B 84040db0
> 000000000000001a - 000000000000001a B 84040db0
> 000000000000001b - 000000000000001b B 84040db0
> 000000000000001c - 000000000000001c B 84040db0
> 000000000000001d - 000000000000001d B 84040db0
> 000000000000001e - 000000000000001e B 84040db0
> 000000000000001f - 000000000000001f B 84040db0
> 0000000000000020 - 0000000000000020 B 84040db0
> 0000000000000021 - 0000000000000021 B 84040db0
> 0000000000000022 - 0000000000000022 B 84040db0
> 0000000000000023 - 0000000000000023 B 84040db0
> 0000000000000024 - 0000000000000024 B 84040db0
> 0000000000000025 - 0000000000000025 B 84040db0
> 0000000000000026 - 0000000000000026 B 84040db0
> 0000000000000027 - 0000000000000027 B 84040db0
> 0000000000000028 - 0000000000000028 B 84040db0
> 0000000000000029 - 0000000000000029 B 84040db0
> 000000000000002a - 000000000000002a B 84040db0
> 000000000000002b - 000000000000002b B 84040db0
> 000000000000002c - 000000000000002c B 84040db0
> 000000000000002d - 000000000000002d B 84040db0
> 000000000000002e - 000000000000002e B 84040db0
> 000000000000002f - 000000000000002f B 84040db0
> 0000000000000050 - 0000000000000050 84049600 (ACPI)
> 0000000000000051 - 0000000000000051 84049600 (ACPI)
> 0000000000000052 - 0000000000000052 84049600 (ACPI)
> 0000000000000053 - 0000000000000053 84049600 (ACPI)
> 0000000000000054 - 0000000000000054 84049600 (ACPI)
> 0000000000000055 - 0000000000000055 84049600 (ACPI)
> 0000000000000056 - 0000000000000056 84049600 (ACPI)
> 0000000000000057 - 0000000000000057 84049600 (ACPI)
> 0000000000000058 - 0000000000000058 84049600 (ACPI)
> 0000000000000059 - 0000000000000059 84049600 (ACPI)
> 000000000000005a - 000000000000005a 84049600 (ACPI)
> 000000000000005b - 000000000000005b 84049600 (ACPI)
> 000000000000005c - 000000000000005c 84049600 (ACPI)
> 000000000000005d - 000000000000005d 84049600 (ACPI)
> 000000000000005e - 000000000000005e 84049600 (ACPI)
> 000000000000005f - 000000000000005f 84049600 (ACPI)
> 0000000000000060 - 0000000000000060 84049600 (ACPI)
> 0000000000000061 - 0000000000000061 84049600 (ACPI)
> 0000000000000062 - 0000000000000062 84049600 (ACPI)
> 0000000000000063 - 0000000000000063 84049600 (ACPI)
> 0000000000000064 - 0000000000000064 84049600 (ACPI)
> 0000000000000065 - 0000000000000065 84049600 (ACPI)
> 0000000000000066 - 0000000000000066 84049600 (ACPI)
> 0000000000000067 - 0000000000000067 84049600 (ACPI)
> 0000000000000068 - 0000000000000068 84049600 (ACPI)
> 0000000000000069 - 0000000000000069 84049600 (ACPI)
> 000000000000006a - 000000000000006a 84049600 (ACPI)
> 000000000000006b - 000000000000006b 84049600 (ACPI)
> 000000000000006c - 000000000000006c 84049600 (ACPI)
> 000000000000006d - 000000000000006d 84049600 (ACPI)
> 000000000000006e - 000000000000006e 84049600 (ACPI)
> 000000000000006f - 000000000000006f 84049600 (ACPI)
> 0000000000000070 - 0000000000000070 84049600 (ACPI)
> 0000000000000071 - 0000000000000071 84049600 (ACPI)
> 0000000000000072 - 0000000000000072 84049600 (ACPI)
> 0000000000000073 - 0000000000000073 84049600 (ACPI)
> 0000000000000074 - 0000000000000074 84049600 (ACPI)
> 0000000000000075 - 0000000000000075 84049600 (ACPI)
> 0000000000000076 - 0000000000000076 84049600 (ACPI)
> 0000000000000077 - 0000000000000077 84049600 (ACPI)
> 0000000000000078 - 0000000000000078 84049600 (ACPI)
> 0000000000000079 - 0000000000000079 84049600 (ACPI)
> 000000000000007a - 000000000000007a 84049600 (ACPI)
> 000000000000007b - 000000000000007b 84049600 (ACPI)
> 000000000000007c - 000000000000007c 84049600 (ACPI)
> 000000000000007d - 000000000000007d 84049600 (ACPI)
> 000000000000007e - 000000000000007e 84049600 (ACPI)
> 000000000000007f - 000000000000007f 84049600 (ACPI)
> 0000000000000080 - 0000000000000080 84049600 (ACPI)
> 0000000000000081 - 0000000000000081 84049600 (ACPI)
> 0000000000000082 - 0000000000000082 84049600 (ACPI)
> 0000000000000083 - 0000000000000083 84049600 (ACPI)
> 0000000000000084 - 0000000000000084 84049600 (ACPI)
> 0000000000000085 - 0000000000000085 84049600 (ACPI)
> 0000000000000086 - 0000000000000086 84049600 (ACPI)
> 0000000000000087 - 0000000000000087 84049600 (ACPI)
> 0000000000000088 - 0000000000000088 84049600 (ACPI)
> 0000000000000089 - 0000000000000089 84049600 (ACPI)
> 000000000000008a - 000000000000008a 84049600 (ACPI)
> 000000000000008b - 000000000000008b 84049600 (ACPI)
> 000000000000008c - 000000000000008c 84049600 (ACPI)
> 000000000000008d - 000000000000008d 84049600 (ACPI)
> 000000000000008e - 000000000000008e 84049600 (ACPI)
> 000000000000008f - 000000000000008f 84049600 (ACPI)
> 0000000000000090 - 0000000000000090 84049600 (ACPI)
> 0000000000000091 - 0000000000000091 84049600 (ACPI)
> 0000000000000092 - 0000000000000092 84049600 (ACPI)
> 0000000000000093 - 0000000000000093 84049600 (ACPI)
> 0000000000000094 - 0000000000000094 84049600 (ACPI)
> 0000000000000095 - 0000000000000095 84049600 (ACPI)
> 0000000000000096 - 0000000000000096 84049600 (ACPI)
> 0000000000000097 - 0000000000000097 84049600 (ACPI)
> 0000000000000098 - 0000000000000098 84049600 (ACPI)
> 0000000000000099 - 0000000000000099 84049600 (ACPI)
> 000000000000009a - 000000000000009a 84049600 (ACPI)
> 000000000000009b - 000000000000009b 84049600 (ACPI)
> 000000000000009c - 000000000000009c 84049600 (ACPI)
> 000000000000009d - 000000000000009d 84049600 (ACPI)
> 000000000000009e - 000000000000009e 84049600 (ACPI)
> 000000000000009f - 000000000000009f 84049600 (ACPI)
> 00000000000000a0 - 00000000000000a0 84049600 (ACPI)
> 00000000000000a1 - 00000000000000a1 84049600 (ACPI)
> 00000000000000a2 - 00000000000000a2 84049600 (ACPI)
> 00000000000000a3 - 00000000000000a3 84049600 (ACPI)
> 00000000000000a4 - 00000000000000a4 84049600 (ACPI)
> 00000000000000a5 - 00000000000000a5 84049600 (ACPI)
> 00000000000000a6 - 00000000000000a6 84049600 (ACPI)
> 00000000000000a7 - 00000000000000a7 84049600 (ACPI)
> 00000000000000a8 - 00000000000000a8 84049600 (ACPI)
> 00000000000000a9 - 00000000000000a9 84049600 (ACPI)
> 00000000000000aa - 00000000000000aa 84049600 (ACPI)
> 00000000000000ab - 00000000000000ab 84049600 (ACPI)
> 00000000000000ac - 00000000000000ac 84049600 (ACPI)
> 00000000000000ad - 00000000000000ad 84049600 (ACPI)
> 00000000000000ae - 00000000000000ae 84049600 (ACPI)
> 00000000000000af - 00000000000000af 84049600 (ACPI)
> 00000000000000b0 - 00000000000000b0 84049600 (ACPI)
> 00000000000000b1 - 00000000000000b1 84049600 (ACPI)
> 00000000000000b2 - 00000000000000b2 84049600 (ACPI)
> 00000000000000b3 - 00000000000000b3 84049600 (ACPI)
> 00000000000000b4 - 00000000000000b4 84049600 (ACPI)
> 00000000000000b5 - 00000000000000b5 84049600 (ACPI)
> 00000000000000b6 - 00000000000000b6 84049600 (ACPI)
> 00000000000000b7 - 00000000000000b7 84049600 (ACPI)
> 00000000000000b8 - 00000000000000b8 84049600 (ACPI)
> 00000000000000b9 - 00000000000000b9 84049600 (ACPI)
> 00000000000000ba - 00000000000000ba 84049600 (ACPI)
> 00000000000000bb - 00000000000000bb 84049600 (ACPI)
> 00000000000000bc - 00000000000000bc 84049600 (ACPI)
> 00000000000000bd - 00000000000000bd 84049600 (ACPI)
> 00000000000000be - 00000000000000be 84049600 (ACPI)
> 00000000000000ff - 00000000000000ff B 84040db0
> Possible allocation:
> < none >
>
> DEVNODE 84db0aa8 (ACPI_HAL\PNP0C08\0)
> Interrupt Arbiter “ACPI_IRQ” at 81ca7f00
> Allocated ranges:
> 0000000000000002 - 0000000000000002 B 8446c770
> 0000000000000004 - 0000000000000004 8446ce00 (Serial)
> 0000000000000008 - 0000000000000008 8446c658
> 0000000000000009 - 0000000000000009 S 84049600 (ACPI)
> 000000000000000d - 000000000000000d B 8446c428
> 000000000000000e - 000000000000000e 8447d6c8 (atapi)
> 000000000000000f - 000000000000000f 84dcb888 (atapi)
> 0000000000000010 - 0000000000000010 S 0000000000000010 -
> 0000000000000010 S 84056030 (pci)
> 0000000000000010 - 0000000000000010 S 84056b98 (pci)
> 0000000000000010 - 0000000000000010 S 84056700 (pci)
> 0000000000000010 - 0000000000000010 S 84057030 (pci)
> 0000000000000010 - 0000000000000010 S 84478b98 (b57nd60x)
> 0000000000000010 - 0000000000000010 S 84478700 (b57nd60x)
> 0000000000000010 - 0000000000000010 S 84057700 (usbuhci)
> 0000000000000013 - 0000000000000013 S 84058030 (usbuhci)
> 0000000000000017 - 0000000000000017 S 84058b98 (usbehci)
> 000000000000001c - 000000000000001c S 8447c5a8 (LSI_SCSI)
> 00000000fffffffc - 00000000fffffffc 8446e268 (SFCBUS)
> 00000000fffffffd - 00000000fffffffd 84476b98 (pci)
> 00000000fffffffe - 00000000fffffffe 84476030 (pci)
> Possible allocation:
> < none >
>
>
>

> But with edge-triggered interrupts, the protocol is more complicated.

Are MSIs - edge-triggered? Usual PCI interrupts are always level-triggered.


Maxim Shatskih, Windows DDK MVP
StorageCraft Corporation
xxxxx@storagecraft.com
http://www.storagecraft.com

Jake Oshins wrote:

From looking that this, I believe that your problem is that one or more of
your ISRs always returns “TRUE.”

Thank you very much Jake, yes, that’s exactly what’s going on. I can run
with this one from here on in.

MH.

I thought the whole idea of using MSI is to not have to share INTs
anymore.
MSI capable chips basically issue a single mem write cycle on the bus to
a configured location (address) with configured data ( =
basevalue+offset, if more than one ‘int’ was granted) to the MSI
controller.
E.g. for Intel chips, IIRC from some ICH onwards, the address is a
mapped register in the APIC.

Or, in other words, the /INT line on the PCI bus isn’t used at all.

Robin Mitra

-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com] On Behalf Of Maxim S. Shatskih
Sent: Sonntag, 14. Januar 2007 19:44
To: Windows System Software Devs Interest List
Subject: Re:[ntdev] WDF, multiple MSI/MSIX interrupts, and
hibernate/rebalance.

But with edge-triggered interrupts, the protocol is more complicated.

Are MSIs - edge-triggered? Usual PCI interrupts are always
level-triggered.


Maxim Shatskih, Windows DDK MVP
StorageCraft Corporation
xxxxx@storagecraft.com
http://www.storagecraft.com


Questions? First check the Kernel Driver FAQ at
http://www.osronline.com/article.cfm?id=256

To unsubscribe, visit the List Server section of OSR Online at
http://www.osronline.com/page.cfm?name=ListServer

Maxim S. Shatskih wrote:

> But with edge-triggered interrupts, the protocol is more complicated.
>

Are MSIs - edge-triggered? Usual PCI interrupts are always level-triggered.

Remember that MSIs are, in a sense, simulated. There isn’t a single
interrupt line, so there are no edges or levelled. MSIs are sent as a
data packet, and once the packet is gone, so is the interrupt. In that
sense, they are “edge-triggered”.


Tim Roberts, xxxxx@probo.com
Providenza & Boekelheide, Inc.

Yes. Let me add to that. The format of the APIC message that your device
generates when it sends an MSI actually encodes “edge-triggered” in the
message. This is necessary for the reason stated below.

  • Jake

“Tim Roberts” wrote in message news:xxxxx@ntdev…
> Maxim S. Shatskih wrote:
>>> But with edge-triggered interrupts, the protocol is more complicated.
>>>
>>
>> Are MSIs - edge-triggered? Usual PCI interrupts are always
>> level-triggered.
>>
>
> Remember that MSIs are, in a sense, simulated. There isn’t a single
> interrupt line, so there are no edges or levelled. MSIs are sent as a
> data packet, and once the packet is gone, so is the interrupt. In that
> sense, they are “edge-triggered”.
>
> –
> Tim Roberts, xxxxx@probo.com
> Providenza & Boekelheide, Inc.
>
>

There are several “ideas” in MSI. MSI means that you don’t have to share
IRQs, as you’re not using them. But IDT entries are still a somewhat scarce
resource, and you may have to share them. This is what the original poster
was testing.

Another important idea with MSI is that you don’t have to touch your
hardware (if the hardware is usefully designed) in your ISR because MSIs
always follow DMA transactions through the chipset so you can guarantee that
your in-memory data is coherent by the time your ISR is invoked.

  • Jake Oshins
    Windows Kernel Team

wrote in message news:xxxxx@ntdev…
I thought the whole idea of using MSI is to not have to share INTs
anymore.
MSI capable chips basically issue a single mem write cycle on the bus to
a configured location (address) with configured data ( =
basevalue+offset, if more than one ‘int’ was granted) to the MSI
controller.
E.g. for Intel chips, IIRC from some ICH onwards, the address is a
mapped register in the APIC.

Or, in other words, the /INT line on the PCI bus isn’t used at all.

Robin Mitra

-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com] On Behalf Of Maxim S. Shatskih
Sent: Sonntag, 14. Januar 2007 19:44
To: Windows System Software Devs Interest List
Subject: Re:[ntdev] WDF, multiple MSI/MSIX interrupts, and
hibernate/rebalance.

> But with edge-triggered interrupts, the protocol is more complicated.

Are MSIs - edge-triggered? Usual PCI interrupts are always
level-triggered.


Maxim Shatskih, Windows DDK MVP
StorageCraft Corporation
xxxxx@storagecraft.com
http://www.storagecraft.com


Questions? First check the Kernel Driver FAQ at
http://www.osronline.com/article.cfm?id=256

To unsubscribe, visit the List Server section of OSR Online at
http://www.osronline.com/page.cfm?name=ListServer