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Latency Clocks

The synthesizer miniport driver model is designed to allow synchronization of audio output between multiple devices. As such, it contains a more complex timing model than that provided by a pure UART device.

Events are delivered to (and captured from) the miniport driver with an associated time stamp. This time stamp is relative to a master clock. The master clock is the same clock used by all sequencing in the entire system. Master-clock time is measured in units of 100-nanosecond ticks.

The master clock is provided to the miniport driver by PortCls as a kernel-mode IMasterClock interface. A pointer to the IMasterClock interface is given at pin creation time when IMiniportDMus::NewStream is called in the miniport driver. Currently, the master clock wraps the system real-time clock. The master clock never changes when there are pins that require it to be in the run state. It is a constant-rate clock that never pauses.

All rendering devices have some amount of latency between the time they accept an event and the time the event can be heard. This latency can be constant or variable (as in the case of a software synthesizer, where the latency depends on the current playback position of the audio buffer). This latency is compensated for by: